[time-nuts] Need help phase locking with small offset

[Bob kb8tq]

Hi

As mentioned in PHK’s post, FPGA’s are quite noisy. They also tend to have
crosstalk issues if you put a whole bunch of nearly identical inputs into them. 

So backing off a bit:

What are you trying to measure? Are you after parts in 10^-13 or parts in 10^-8? 
That will make a *big* difference in how this all works out. 

> On Sep 13, 2020, at 3:39 PM, Stewart Cobb <stewart.cobb at gmail.com> wrote:
> 
> I'm sketching out the design of a mostly digital device similar to a DMTD
> but with many input channels.  The heart of it is an FPGA clocked by an
> OCXO at a frequency with a small offset (say,  1ppm) from a multiple of a
> "perfect" 10 MHz reference (GPSDO or similar). EBay has many very good 100
> MHz OCXOs removed from scrapped microwave gear, so I'm looking at using one
> of those as the FPGA master clock. The question is how to lock the 100 MHz
> OCXO to the 10 MHz reference input with a slight offset, so that the OCXO
> frequency is "exactly" 100,000,100.000 Hz (for example).
> 
> I can think of several different ways to do this, and I don't know which
> one is best. I am not an expert on analog circuitry or noise, and I'd like
> to hear the opinions of those of you who are.
> 
> A) The obvious solution is to find a PLL chip that will do the job. This
> would require setting the phase comparison frequency at 10 Hz, and would
> require a PLL chip with a 20-bit reference divider and a 23-bit input
> divider. I'm not sure those are available. Perhaps a fractional PLL could
> work.

If you go down to a 100 Hz phase comparison frequency (which you *can* do) the
noise from the PLL IC will be pretty significant. ( = to noisy to make it useful )

> 
> Note: It's easy to put the dividers inside the FPGA. The OCXO will be the
> master clock for the FPGA anyway, and in practice the reference input would
> always be connected to one of the measurement inputs. That leads to the
> following ideas:
> 
> B) I could implement a DDS inside the FPGA, dividing the OCXO by 10.00001
> and driving a DAC to generate an output frequency at exactly 10 MHz. Then
> mix this output with the reference input in an analog phase detector,
> filter the DC output, and use that to steer the OCXO. This could also be
> done with an external DDS, if one exists with sufficient resolution.

DDS “stuff” tends to generate spurs. Getting rid of them is not simple ….

> 
> C) I could divide the OCXO by 1,000,001 and output a short pulse (10 ns)
> every time the divider rolls over (10 Hz).  That pulse could drive a
> sampler of some sort (a diode bridge, an analog switch, or a differentiator
> copied from reference inputs on old HP gear) which measures the reference
> input near its zero crossing, filters the measurement, and uses that to
> steer the OCXO.

Which will give you a horrendous spur on your output right where you don’t want it ….

> 
> D) I could connect the 10 MHz reference to one of the measurement inputs
> (it usually will be anyway) and use the DMTD's inherent precision to
> generate digital measurements of the relative phase and frequency offsets,
> then digitally filter those measurements and use the result to drive a
> precision DAC to steer the OCXO.

Since you don’t *need* a precision offset, just use a pot. Set the OCXO about 
10 Hz high and move on. It all drops out in the math…….

Bob

> 
> I'm leaning toward (D), because the precision DAC could be a Delta-Sigma
> implemented mostly inside the FPGA, leading to minimal extra parts count.
> Both (A) and (C) are limited to comparisons at 10 Hz or less, and I'm
> concerned about possible noise and drift between those comparison instants.
> (B) doesn't have that limitation, but I'm not sure whether (B) adds noise
> because it's continuously filtering rather than taking narrow points in
> time, or whether that mode of action actually filters out noise. (B) also
> may suffer from DDS spurs.
> 
> Any comments from the analog gurus?
> 
> Cheers!
> --Stu
> 
> PS: an offset of one "binary ppm" (2^-20) may work better in this system
> than one "true ppm" (10^-6). That shouldn't affect the above options,
> except that it might reduce DDS spurs in option (B).
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