[time-nuts] Re: Micrel (Microchip) PL-500 Low Phase Noise VCXO

[ed breya]

Did you say there's a 1 mH choke at the LDO input? I gather that 
overall, you're regulating 5 V in to 3.3 V out, running the IC that 
takes a few mA DC, and loading the CMOS output with 50 ohms scope input 
(or a 50 ohm terminator on a scope or probe setup). I'd recommend the 
following changes.

1. Get rid of the choke, or at least replace it with a much smaller one 
that will be more effective - say no more than 100 uH. Especially in 
surface mount, it will be much smaller too.

2. Put big bypass caps at the input and output of the LDO. Solid Ta caps 
are best for this, like in the tens to a hundred uF, readily available 
in surface mount. If you keep a choke at the input, bypass the 5 V input 
end also. Especially for experimenting, it's a good idea to add reverse 
protection in case you screw up the hookup. For low voltage stuff, use a 
shunt diode from the input supply to ground, big enough to dump the 
supply if backwards.

3. Don't bother with DMMs and scope-probing the various supplies and 
such, except for troubleshooting. Once you confirm proper operation, 
disconnect all the probes and grounds - otherwise, they'll just form all 
sorts unnecessary ground loops, and confuse things. They don't have good 
enough CMRR to show what's really going anyway.

4. Run the I/O signals in coax. Ultimately, the actual application may 
need the full output signal, but for experimenting, it's best to pad the 
output into coax to get it to the scope or SA, or whatever.

A simple method is to AC-couple it with a good RF cap, say in the 10 nF 
range (for 26 MHz), then a series resistor into the coax, and a shunt 
resistor there, to get it in the 50 ohm Rs range - it doesn't have to be 
perfectly matched. The series resistor should be as big as possible, to 
minimize loading on the IC output, but small enough to get sufficient 
signal for measurements. Again, in an actual possible application, the 
full signal may be needed, but the load on the output would only be the 
input of a buffer amp or logic, that's nearby, so not needing to take a 
long trip.  This setup should provide a more realistic view of how the 
IC behaves.

For the control voltage, there would not be RF issues, but some 
bypassing at the IC is good, just to clean up local RF, but not so much 
that it affects loop response if you're PLL-ing it, for instance. There 
can be DC ground loop issues though. Looking at it as a black box, 
you'll have the power supply common, the output common, and the control 
signal common, all capable of carrying some of the supply return 
current, depending on how things get hooked up. In a real application, 
these paths would be minimized and dealt with, but for experimenting, 
you have to keep it in mind and be sure you know and properly control 
the tuning voltage, referenced to the local common at the IC. It's also 
a good idea (for experimenting) to clamp the tune voltage within its 
normal range, just in case. This is not likely needed in a real application.

This should provide a fairly clean setup. If there are still annoying 
common-mode issues with the measurements, you can add CM chokes as 
needed, around all of the lines together, going to the black box.

Ed