[time-nuts] Re: RCB-F9T Adapter PCB with USB and 50 Ohm Timepulse SMA Connectors

[John Ackermann N8UR]

On 8/24/22 04:26, Bruce Griffiths via time-nuts wrote:

> Even this is much lower than the jitter of typical FPGAs when the effect of cross coupling from other clock domains such as internal oscillators etc are taken into account.

This reminded me to mention -- crosstalk within the 74AC04 package is a 
consideration.  In the TADD-2 PPS divider each output is derived from 
three gates of a 74AC04 hex inverter, and can be independently set to a 
different divisor rate (e.g., 1PPS, 100PPS, etc.).

Running two different rates into the same chip resulted in some 
noticeable crosstalk from the faster to the slower rate.  Since 
discovering that I've always made sure only one input clock goes into 
each package.

John