[time-nuts] Re: Timestamping counter techniques : phase computation question

[Bob kb8tq]

Hi

The whole dead zone / interaction thing is as much layout dependent
as it is circuit related. Even the guys at HP / Agilent / Keysight seem 
to struggle on and on with this. The 10 MHz input to the clock
system has created issues for a *long* time. 

Bob

> On Feb 1, 2022, at 9:30 AM, Erik Kaashoek <erik at kaashoek.com> wrote:
> 
> Bob,
> Thanks for the feedback, always welcome.
> 
> I recognize HW is an important topic that requires a lot of attention.
> 
> With respect to the harmonic interaction. How "close" do you think the input and the clock need to be for the interaction to start? With a 200MHz clock, does that leave some space for low frequencies (but not so low it does not matter anymore) to move the clock away from the danger zone?
> Erik
> On 1-2-2022 14:50, Bob kb8tq wrote:
>> Hi
>> 
>> The main point about “added hardware” is that this *is* how a counter
>> gets from the numbers I mentioned to performance that is better than
>> that. It’s not done by running some magic math that somehow improves
>> a basic sampling counter by a couple orders of magnitude.
>> 
>> Since that hardware is off topic, I suspect that’s as far as this needs to go.
>> 
>> The dead band issue can come from a variety of interactions. There pretty
>> much is *always* going to be some harmonic of the signal that hits some
>> harmonic of the clock. The best you can do is hope that both are high enough
>> that the interaction is not a big deal.
>> 
>> Bob
>> 
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