[time-nuts] Re: PICDIV stability

Attila Kinali attila at kinali.ch
Sat Jan 8 11:05:52 UTC 2022


On Fri, 7 Jan 2022 19:05:58 -0800
Tom Van Baak <tvb at LeapSecond.com> wrote:

> Attila -- I have not measured the voltco. Note the T2-mini has an 
> onboard regulator. I also have not measured tempco. Although the jitter 
> is about 1 ps the wander over that 10 minute run is about ±6 ps (2.4 ps 
> rms). Look at the phase plot in the test results. This is also why the 
> ADEV plot has that characteristic plateau from tau 2 to 20 s.

I can't seem to find the phase plot you mention. 

> IIRC, the test was done causally on a floor in open air so walking, 
> breathing, drinking coffee, and checking email are known to wiggle 
> things at the picosecond level. Someone could look into this more if 
> they wish. I would be interested to know how much of the wandering is 
> due to the voltage regulator vs. Wenzel transistor circuit vs. the PIC 
> vs. the 74AC chip.

But I think the culprit here is not the PIC but the sine-to-square wave
converter at the input. The design is quite sensitive and needs a nice
environment to perform well.

Attached is my version of the design, trying to improve on it. 
(ignore the double resistors in parallel and series. I used those
to keep the BOM small for production)

First improvement is to make the circuit symmetric. A lot of variability comes from
the asymmetry of the two branches. Thus making everything symmetric improves stability
and decreases noise.

Second improvement is to stabilize the current through the circuit using a current
mirror. This alone reduces the sensitivity to supply voltage variation by a factor 4.
Further improvment can be made by using an opamp based current source with a stable
and low-noise voltage reference.

Third improvement is to replace the input inductor by a proper filter.
I figured out that the inductor in itself doesn't do much for filtering
as its impedance at the relevant frequencies is too low. Changing it to
a proper LC filter helps quite a bit. Additionally, adding a damping element
(R801/802, C803/804) reduces resonances and thus further improves PSRR.
The weird looking capacitor C801 is a pass through capacitor. A normal
ceramic capacitor should work equally well here. Also note that the start
of winding of the inductor is facing the diff-pair. This is in order to
minimize coupling noise into the inductor.

Forth improvement is to use a second stage, thus applying Collins [1,2]
lessons to the circuit. It also allows to use differential output from
the diff-pair amplifier, further increasing PSRR. The choice of comparator
chip is, as far as I can tell, not critical. I choose the LTC6752 because
it works down at 4V (actually 2.45V) and has a seperate supply for the output.
I switched hysteresis off to remove one noise term [3] as the input slew rate
is fast enough, but I doubt it makes much of a difference.

Fifth improvement is to make the supply low voltage. The design here is done for 4V
in order to be able to power everything from USB. The design does work at 5V as well.
Only change I'd do is to increase the 200Ω resistance in the current mirror (R807/808)
to 270-300Ω.

Unfortunately, I did not have the possiblitiy to measure and characterize this circuit.
If you have some time to spare, I would welcome some measurements. 
Also feel free to critizise my circuit. I would love to hear how it could be further
improved.

I noted a valid input power range. The lower end is limited by the gain of the
diff-pair and its ability to increase the amplitude enough to drive the comparator
properly. The upper end is limited by the collector-emitter voltage seen by the
diff-pair. Above 16dBm the transistors start to saturate and the linearity drops.
At 20dBm the base goes to negative voltages and weird things start to happen.

Another thing to note is, that the slope-gain of the diff-pair changes with input
power. And with the slope-gain also the delay through the circuit. Or in other
words, there is some AM to PM conversion. Thus you should ensure that the input
amplitude is as constant as possible. I don't remember whether I characterized
this, though. So I don't know/remember how big the effect is.

If you build this circuit, please note that the two filter capacitors for the
comparator are NFM21PS106B0J3 from Murata. They have very good high-frequency
characteristics. If you use other capacitors, you will need to stagger them
as 10µF, 1µF 100nF, 10nF to get the same performance. Though starting at 10µF
is probably overkill and starting from 1µF should be enough.

				Attila Kinali


[1] The Design of Low Jitter Hard Limiters, by Collins, 1996

[2] A Fresh Look at the Design of Low Jitter Hard Limiters, by yours truly, 2019
http://people.mpi-inf.mpg.de/~adogan/pubs/IFCS2019_collins_isf.pdf

[3] A Physical Sine-to-Square Converter Noise Model, by yours truly, 2018
http://people.mpi-inf.mpg.de/~adogan/pubs/IFCS2018_comparator_noise.pdf
-- 
Science is made up of so many things that appear obvious 
after they are explained. -- Pardot Kynes
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