[time-nuts] Re: Seeking feedback on a HW Architecture for a DIY two channel timer/counter and frequency reference

[Erik Kaashoek]

Hi Magnus

On 18-7-2022 14:58, Magnus Danielson via time-nuts wrote:
> On 7/16/22 16:31, Erik Kaashoek via time-nuts wrote:
>> A third input can be used either for a GPS antenna for the internal 
>> 10MHz GPSDO or for input of an external 10MHz reference.
> This is useful. If you also can make it accept 5 MHz it will be even 
> better. Depending on where you are, 5 or 10 MHz is the base frequency.
Can do.
>> Given the form factor, 4 inputs/output is the maximum possible.
>
> Each additional input after 2 will give additional capability to 
> measure things.
More than 2 full blown inputs (e.g. with fast coparators and 
subsampling) may not be possible.
>
>> Does this setup of inputs/output make sense?
>> Are there any suggestions for improving this architecture?
>
> While not directly visible in the architecture, there is two things 
> I'd like to high-light:
>
> First is the input side, it needs to have as low noise as possible, 
> but also amplification around the trigger point to increase slew-rate 
> with as little bandwidth as needed. This is the traditional wisdom at 
> least, for best single-shot resolution performance. Then you have 
> people like me that points out more subtle points, but those becomes 
> valid only after:
The used input comparators can do 100MHz and have a hysteresis of 5mV 
around the set trigger level. Would that work?
>
> The maximum sample rate of the TIC is important. For good result, you 
> want to decimate the samples before or integrated with phase, 
> frequency and linear drift estimation. The gain of that depends 
> heavily on the hardwares ability to do high rate of samples, since 
> this can then increase the amount of samples that goes into each 
> estimation
The advantage of having all the counters inside the MCU is the ability 
to reach high sample rate with little effort. Currently 5e4 sample/s is 
possible, further optimization may still be possible. The 5e4 samples 
are used in frequency and phase estimation.
With 5ns TIC resolution and the subsampling the frequency difference 
between two clocks, one at 1MHz and one at 1.00000001MHz, can be 
measured with maximum 3e-10 variation, including the pulling that 
happens when the two clocks have (almost) equal phase.
The phase measurement of the same two clocks has about 100ps variation.
The HW is still a dead bug style mess so improvement should be possible.
> .
>
> With such decimation in place on high enough sample rate, some noise 
> can actually be beneficial. This will reduce the single-shot 
> resolution for the benefit of decimated resolution. This technique was 
> in commercial use in the 70thies, but before it could be fully analyzed.
Where do you put the noise? The subsample moments? I tried and that did 
not help. Maybe bad implementation.
The trigger level? But that would not help with square wave input
The reference clock? How would you do that?
Its possible to switch the internal reference clock (derived from TCXO 
or external reference) to another frequency to avoid a simple integer 
relation with the measured clocks. For test I implemented 
213.33333333333MHz, 200MHz and 2045MHz as reference clock frequencies 
and for measurements of multiple of 1MHz the 213.333333333MHz clock 
delivers the best results.

Erik.