[time-nuts] Re: shoestring budget & jitter AVR328p

[chris at chriscaudle.org]

   On Oct 16 2023, at 6:11 am, folkert via time-nuts
   <time-nuts at lists.febo.com> wrote:

Now I read somewhere that delays of less than 5ms are
usually not audible but does that also apply to jitter?

   That needs context, blanket statements like "x is not audible" need to
   describe the situation, e.g. starting playing 5ms later (e.g. you
   pushed the play button on a file player) 5ms later than you did
   yesterday is obviously not audible, but delaying a signal by 5ms and
   adding to the original will cause severe comb filtering, and delaying
   only one side of a stereo signal by 5ms will cause a very noticeable
   shift in the stereo image.

   So when you want to talk similarly about clock jitter, you have to
   define how the clock is being used, and what device is using the clock.

   In general discussing jitter of a clock used for sample conversion is
   better discussed in the frequency domain as phase noise, and then you
   additionally need to know the sensitivity of the converter to phase
   noise on the clock.

First step in the investigation of that is to quantify how much the
jitter introduced is (I guess).

   The usual process would be to measure the phase noise of the clock, and
   then while having the converter convert a digitally generated single
   frequency test signal (assuming the conversion is from digital to
   analog) clocked by a high quality clock generator, measure the output
   signal with known levels of phase noise at various frequencies added to
   the clock while measuring the output signal to see when measurable
   sidebands are generated for each frequency and amplitude of added phase
   noise.  You can then compare the measured sensitivity of the device to
   clock phase noise to the measured phase noise of your generated clock
   and determine whether it is likely to be a problem for your use.

   For high quality conversion the phase noise of the clock can be a
   concern, but using 8 bit devices relaxes your constraints considerably.
    One thing which may be a concern even at the higher noise floors of an
   8-bit device is repetitive division errors which could show up as a
   distinct tone in the conversion.  For most converter designs phase
   noise on the sample clock become phase or frequency modulation of the
   output signal, and since that is typically independent of the source
   signal it becomes an aharmonic interfering signal that is signal level
   dependent.  Having no harmonic relation to the source signal
   potentially makes it much more noticeable.

   -- Chris Caudle

   On Oct 16 2023, at 6:11 am, folkert via time-nuts
   <time-nuts at lists.febo.com> wrote:

Hello,

As an electronic music-enthousiast I also tinker with sound-chips of
the 8- and 16-bit age. Circuit bending for example. And about that I
have a question.
On my website I published a page describing in a nutshell how tweaking
the clock-frequency of a Philips SAA-1099p soundchip gives interesting
sounds ( https://vanheusden.com/electronics/SAA1099-clock/ ). Here I use
a timer of the Arduino Nano (AVR 328p) as a clock for the SAA1099p
soundchip.
A friend of mine read this and asked me if I have any ideas about the
jitter introduced. Like: if I set the clock to 4MHz, how much jitter
would this give. Now I read somewhere that delays of less than 5ms are
usually not audible but does that also apply to jitter?
First step in the investigation of that is to quantify how much the
jitter introduced is (I guess). I know that when you have a PPS
signal, that you can easily feed that to code that calculates the allan
deviation, but how about clocks in the MHz range? If I divide the clock,
wouldn't that average out any jitter?
My budget is limited and/but I (do) have a hantek DSO-6022BL
oscilloscope, some PicDivs and a 10MHz TCXO.


Regards,

Folkert.
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