[time-nuts] Digital PLL ICs, alternatives and digital loop filters

Dr Bruce Griffiths bruce.griffiths at xtra.co.nz
Sat Dec 16 20:26:37 EST 2006

John Miles wrote:
> Yeah, for one OCXO disciplining another, I'd just use a 74F90 and 74HCT4046, 
> like that quick-and-dirty design did.  The loop gain will be low and the 
> integration period will be measured in seconds or even minutes, so I don't 
> believe noise is going to be worth worrying about.  It would be hard to 
> screw up too badly in this scenario.
> As far as modern chips go, the ADF4002 is a new favorite of mine.  It's 
> capable of very high performance at N and R ratios down to 1... but it will 
> require a microcontroller.   You also need to be comfortable doing your own 
> loop design for it.  (I am suspicious that ADIsimPLL has a bug that gives 
> misleading results with small KVco values, but am not entirely sure about 
> that yet.)
> -- john, KE5FX
> ----- Original Message ----- 
> From: "Didier Juges" <didier at cox.net>
> To: "Discussion of precise time and frequency measurement" 
> <time-nuts at febo.com>
> Sent: Saturday, December 16, 2006 2:50 PM
> Subject: Re: [time-nuts] Digital PLL ICs,alternatives and digital loop 
> filters
>> John Miles described a clean 110 MHz PLL from a 5.5 MHz source, which he
>> used in his tracking generator project.
>> http://www.thegleam.com/ke5fx/tr503.html
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If the required performance is anywhere near the state of the art, your 
proposed method is not an option.

Well designed frequency multipliers have considerably lower phase noise 
than digital dividers.
Parametric dividers have very low phase noise but usually only divide by 
2 and/or multiply by 3/2.

Mixers using Schottky diodes have much lower phase noise than any 
digital phase detector.

Low phase noise 100 MHz crystal oscillators have higher close in phase 
noise than a 100MHz signal produced by multiplying a low phase noise 
5MHz crystal oscillator output to 100 MHz when low phase noise 
multipliers are used.

There is no rational substitute for measuring the phase noise of the 2 
oscillators and actually designing the circuit to meet the 
specifications rather than just chucking it together.


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