[time-nuts] Net4501

[Bob Camp]

Hi

If you are running the OS on a MCU you already have / can have the same clock for the Ethernet as for the OS. Never a cycle lost between them. The only issue is to sync the 1588 counter to the NTP / OS clock. 

Bob

Sent from my iPhone

On Jun 8, 2013, at 2:53 PM, Chris Albertson <albertson.chris at gmail.com> wrote:

> No, NTP still needs to read the internal CPU cock.  The reason you read the
> counter every with each PPS is not to find out when the puse occurred, no
> the point is to measure the in-accuracy in the rate of the counter.
> 
> So if I direct the PS to an Ethernet card what I'm doing is measuring
> the in-accuracy of the card's internal oscillator.  That would be fine if
> only the OS used that as abases for system time.  But it doesn't. The OS
> uses the internal CPU counter for that.
> 
> You have to look at the goal.  The goal is to GPS-disipline the rate and
> phase of the OS' system time.   To do that you have to measure whatever
> oscillator drive that OS' system time.
> 
> If somehow you could modify the OS to use the oscillator on the ethernet
> card as a source of time then yes you could sample that oscillator ever
> second but you'd have to first modify the OS to use that clock for time
> keeping.
> 
> 
> On Fri, Jun 7, 2013 at 5:35 AM, Bob Camp <lists at rtty.us> wrote:
> 
>> Hi
>> 
>> All of the MCU based 1588 interfaces I have seen allow you to "get at" the
>> internal 1588 stamping clock. You can stuff your pps in there and compare
>> it directly to the stamps it puts on the incoming and outgoing packets. If
>> you are on an MCU, the 1588 clock can easily be the same as your CPU clock
>> (or at least derived from the same source). Stamping with the 1588 counter
>> in that case is no different than stamping with the cpu clock.
>> 
>> Doing the same thing on a pc is a bit more complex. If you can get at the
>> stamping inputs and outputs, it's another layer, but still doable.
>> 
>> Bob
>> 
>> 
>> 
>> Get the free running 1588 counter 1 pps output to agree with your local
>> clock output.
>> 
>> 
>> On Jun 7, 2013, at 12:16 AM, Chris Albertson <albertson.chris at gmail.com>
>> wrote:
>> 
>>> Network time stamping is a different issue.   You are thinking of time
>>> transfer over a network.   What the above is about is capture the pulse
>> per
>>> second from a GPS.   We actually do NOT want to time stamp the PPS.  We
>>> want to capture the computer's internal clock so that it can be compared
>> to
>>> the PPS.  The purpose is to adjust that internal clock.
>>> 
>>> Then one this is none is some set of stratum 1 NTP server, then you can
>>> transfer the time over Ethernet.
>>> 
>>> 
>>> On Thu, Jun 6, 2013 at 5:48 PM, Bob Camp <lists at rtty.us> wrote:
>>> 
>>>> Hi
>>>> 
>>>> 1588 compatible network cards are capable of time stamping everything
>> that
>>>> goes in and out. They are pretty common these days both as stand alone
>>>> cards and as peripherals on MCU's. There's no real need to do hardware,
>>>> just come up with drivers (and all the other  software goop) to make
>> them
>>>> work with NTP. More or less the same work you would have had to do once
>> the
>>>> FPGA was done and debugged.
>>>> 
>>>> Bob
>>>> 
>>>> On Jun 6, 2013, at 8:32 PM, Ralph Smith <ralph at ralphsmith.org> wrote:
>>>> 
>>>>> On Jun 6, 2013, at 1:59 AM, Chris Albertson <albertson.chris at gmail.com
>>> 
>>>> wrote:
>>>>> 
>>>>>> Yes, that is exactly what I meant by "remove the temperature issue"
>>>> that
>>>>>> means using a clock derived from a laboratory standard like GPS
>>>> disciplined
>>>>>> OCXO or a rubidium oscillator.  Once you do this the next bottle next
>> is
>>>>>> the uncertainty in the interrupt latency and the granularity of the
>>>> clock
>>>>>> that is being sampled.  So practically you are limited to about
>>>> microsecond
>>>>>> level performance.
>>>>> 
>>>>> The Net4501 is capable of about 1/8 microsecond performance, the
>>>> limiting factor here is clock granularity.
>>>>> 
>>>>>> I think to get better than that you need to eliminate the interrupt
>> and
>>>>>> have some kind of deterministic hardware where the PPS directly
>> samples
>>>> the
>>>>>> counter.  Perhaps hosting NTP on a soft CPU inside an FPGA, then you
>>>> could
>>>>>> implement the PPS interrupt in gates rather then in software.   I've
>> not
>>>>>> read of anyone doing this yet.
>>>>> 
>>>>> If you look at PHK's code in FreeBSD this is what is done. The PPS
>>>> signal gates the timer, so no interrupt is involved in the time stamp
>>>> precision. But yes, it would be interesting to do something on a FPGA.
>>>> Unfortunately I wouldn't be able to get to anything like that myself in
>>>> this lifetime.
>>>>> 
>>>>> Ralph
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>>> 
>>> 
>>> 
>>> --
>>> 
>>> Chris Albertson
>>> Redondo Beach, California
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> 
> 
> 
> -- 
> 
> Chris Albertson
> Redondo Beach, California
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