[time-nuts] 1 pps sync'ing

[Attila Kinali]

On Fri, 29 Jun 2018 14:13:10 +0100
"Martyn Smith" <martyn at ptsyst.com> wrote:

> I'm not trying to achieve 1-5 ns to UTC as that's not possible as already
> pointed out, just 1 to 5 ns to a reference 1 pps (from Hydrogen Maser).

How about just using an FPGA then? If you clock it at 200-400MHz,
then you can built a digital phase stepper with 2.5-5ns step size.
The FPGA can also handle the synchronization to an external pulse
quite easily and do fault detection (like the pulse suddenly jumping)
etc pp. 

Disadvantage of this is, that the output of an FPGA is rather noisy.
Ie you will not get very low phase noise/jitter, but depending on your
specs, it might be actually enough. If you need lower phase noise,
you'd need to add a D-flipflop outside of the FPGA to syncrhonize
the output. If done right, this give a jitter in the order of 100-200fs.

> We definitely need all rising edges synchronised.  Of course, we will have
> to be very careful with cabling lengths etc otherwise we will lose all this
> synchronisation.

Cable length of 1m is somewhere in the order of 6-7ns delay. You have to
be careful with lengths, but not very much so. If the cables are matched
up to 1-2cm, that should be enough.

			Attila Kinali

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