[time-nuts] A simple sampling DMTD

[Jan-Derk Bakker]

Dear Attila,

> The test was run for 175k seconds (just over 2 days) in a very much
> > non-temperature controlled attic. The resulting ADEV can be found at
> > http://www.lartmaker.nl/time-nuts/DMTD%20self-noise%20ADEV.pdf ; the
>
> This looks good, but I would still expect the start of the ADEV plot,
> ie the precision of the single measurements to be about half an order
> to an order of magnitude lower. For comparison, commercial DMTD systems
> operate at about 1e-13 at 1s, which is mostly dominated by the mixer
> noise and temperature coefficient. I would expect you to be close to
> 1e-12 at 0.1s, even before filtering.
>

Is this not caused by the fact that I'm currently subsampling the ADC
(conversion rate 10Msps, rate into the microcontroller 100ksps by dropping
99 put of 100 samples)? In my simulations this accounts for almost exactly
20dB of noise (as expected). The FPGA board will make a filtered rate
reduction possible, of course.

(I'm also trying to find the balance between "perfect" and "good enough"
here. My original target was 1ps RMS; I'm hitting that even at 100ksps with
some light filtering. This DMTD is a means, not an end, and at some point I
will hit diminishing returns; engineering time spent on the DMTD cannot
also be spent on the phased array. Of course, I do try to get all low
hanging fruit before putting the DMTD into service.)

<snip>

You do want the notch filters in front of the ADCs. Once the harmonics
> enter the system, they already contributed to noise conversion. Digital
> filtering helps only if you can completely separate the harmonics from
> the signal, which is not possible due to non-linearity of the ADC.
> So, I would suggest to have at least some filtering in the frontend
> and then clean up the rest in the digital domain.
>

Thanks, will put that on the list. This would have to be a separate
pluggable filter, as I need to support different input frequencies with the
same DMTD.

I don't remember what uC you are using, but CORDIC would be the way to
> go in most places, especially if you want lots of bits. You need something
> in the order of 2-5 stages more than you want output bits and about as
> many intermediate bits more.
>

Yes, I'm looking at CORDIC. The CPU I'm using, an Atmel/Microchip XMega,
doesn't have a barrel shifter; to speed up the ZCD I'm playing with an
unrolled CORDIC where I use the hardware multiplier instead.

Sincerely,

JDB.