[time-nuts] Question for my new GPSDO

Tobias Pluess tobias.pluess at xwmail.ch
Mon Nov 4 20:51:32 UTC 2019


Sali Attila,

I collect the responses to your last 3 emails in this one.

> Summa sumarum: if you can, use low leakage film capacitors, if not use
> ceramic. Microphonics can be mitigated a bit by using ceramic capcitors
> with high rated voltage. But don't expect magic from that.

Thank you for that hint. Of course I know about tangens delta (dissipation factor) of capacitor materials, but I didn't think about this subject in conjunction with PWM filters.
However, I anyways planned to use ceramic capacitors, and since their capacitance and microphonics depend on the size of the caps (the smaller, the worse) I use 1210 sized SMD capacitors. On the Oscilloquartz GPSDO I have, they have used even larger caps, and I think they could be even NP0 or similar - but definitely not X7R or Y5U dielectric (as far as I remember I think the latter one is one of the cheapest, but also the worst in terms of piezoelectic effects {capacitance dependent on voltage}).



> You came up with the exact same solution as I did :-)
> The only difference I can see is that I added more extensive filtering
> than you did (yes, I'm a bit paranoid).
> For the people listening in and comparing this to the TICC:
> Using a 10MHz signal instead of an 1MHz signal as the TICC does
> has the advantage that the TDC7200 has a lower uncertainty for
> short measurement periods (see figure 17 in the datasheet).
> This should potentically get the timing uncertainty RMS down to 70ps.
> (probably even lower, as for 100ns the uncertainty is in the order
> of 40ps)

I plan to feed the sine voltage from the OCXO into the microcontroller's oscillator. Further, the microcontroller offers a functionality to output the clock signal on one pin, and this is a perfect square wave which is suitable for the TDC7200 - this IC needs 1ns rise and fall time square wave signals! 



> It does. You will have to asign the edge you capture unambigously to the
> reference edge of the 10MHz. The only way to do this is to use the signal
> out of the half-nutt-interpolator and feed it to the uC, which in turn
> derives its clock from the 10MHz. Additionally, the timer unit has to
> run at a higher frequency, so you can avoid problems due to metastability.
> My solution was to run the timer at 80MHz, which separates the clock
> ticks far enough that each captured instance can be unambigously matched
> to a 10MHz edge. Fortunately, some of the timers of the F40x are just fast
> enough to manage this.

Thanks also for your schematic of the Nutt interpolator. I will do it the same way.
I will run my uC at the 10 MHz clock frequency with the PLL disabled. This is because I already made the experience on the STM32F303 that the PLL is not so stable but has a slight frequency modulation. I don't really have an explanation for this, but the stability was much worse when the PLL was on compared to when it was off, which is very interesting because I don't think it is a fractional PLL. Anyway, I don't know what the stability issue with the PLL is, so I wil not be using it which is a bit sad because it would come in handy. On the other hand, when the PLL is used, another problem would arise, namely that the timers are clocked from the PLL and not from the OCXO directly. It is possible to use another external clock for the timers, but in that case, the clock is synchronized to the internal clock, which we definitely don't want!



> The second step is to have some D-FF's at the output to synchronize
> this pulse to the 10MHz of your OCXO (see attachement). 

I don't see why this should be necessary when the uC is clocked directly from the OCXO - in that case, the output signal would be synchronous to the OCXO anyways.


>  Ah! I love it when people do not ignore metastability! :-D

In this kind of project I think about metastability all the time and almost get nightmares because of it ;-) even though I don't know how serious that problem really is - I have already built a lot of circuits using logic gates, and only once I really saw a metastability issue with a flipflop. 




> I have not been able to figure out what UCT is or was. Currently my
> guesses are that it was either a label Oscilloquartz used in the US
> or it was a manufacturer that licensed the 8663 design.
> BTW: You might want to have a look at the AXIOM130HP which is
> a replacement part for the 8663 with the same stability specs
> but slightly better phase noise.
> Which makes me now wonder, what Axtal did to get this much further
> down in noise without compromising aging. Bernd? If you are reading
> this, would you mind to shed some light on this question?

Me neither. I got those OCXOs from ebay, and I am pretty sure they are brand new, because there are absolutely no remainders of tin on their leads, and they came in a box with an Oscilloquartz adhesive tape on it, so I'd guess that UCT is some Oscilloquartz brand. But Google does not yield any results for this name.
Besides the 8663 oscillators, I also have bought a while ago an AXIOM oscillator from Bernd for which he even made phase noise and ADEV measurements - really awesome. My requirement was that the phase noise at 100 Hz offset should be better than -140 dBc because I want to use the GPSDO as reference signal for my spectrum analyzers (HP 8566B and 8568B), both of which have this requirement in their manuals. I also have an 8663A signal generator and I read somewhere that the phase noise can be decreased if a lower noise external reference is used - the 8663A internal reference is the HP 10811A oven which has -140 dBc @ 100 Hz, so if the external reference is better, the signal generator should come closer to its residual noise which is somewhere at -160 dBc @ 100 Hz, if I remember correctly.
BTW, I plan to use this signal generator later on to measure clock stability with the DMTD method - pretty new to me and will be interesting to set up.



Best
Tobias


________________________________________
From: time-nuts [time-nuts-bounces at lists.febo.com] on behalf of Attila Kinali [attila at kinali.ch]
Sent: Sunday, November 03, 2019 15:57
To: Discussion of precise time and frequency measurement
Subject: Re: [time-nuts] Question for my new GPSDO

Hoi Tobias,

On Wed, 16 Oct 2019 16:30:19 +0000
Tobias Pluess <tobias.pluess at xwmail.ch> wrote:

> I attached my own schematics of the EFC control circuit. I think with this
> circuit, it should be possible to achieve a similar resolution as you
> mentioned in your thoughts.
>
> D3 is a 16bit resistor string DAC and therefore inherently linear.

There is, as far as I know, only two types of DA converters that
are inherently linear: single-bit delta-sigma modulators and
Kelvin-Varley dividers. And both still exhibit a slight amount
of non-linearity due to non-idealities of the components
(for the delta-sigma it's mostly rise/fall time asymmetry,
for the Kelvin-Varley it's leakage currents)

The biggest issue of R-2R DA converters is that the MSB resistance
has to be precise to better than 1/2^(#bits). Which, of course, is
very hard to achieve. Anything beyond 12bit converters requires
adjustment after production (usually done by laser triming the
chip while on the wafer). You can see this, if you look at honest
datasheets (like those from Linear) that they always show a step
at mid-range. The DAC8560 datasheet only shows a very slight one,
much smaller than the rest of the variation seen. Which makes me
believe they might have picked one DAC that was exceptionally good.

> With a OpAmp gain of 4, 0 to 10 Volts can be produced at the output of N2A.
> This is sufficient for the UCT-108663 oscillator (which seems to be the same
> as the Oscilloquartz 8663). For the AXIOM75 oscillator, only 0 to 5 volts
> would be required, so the OpAmp's gain would be reduced to 2 in that case.

I have not been able to figure out what UCT is or was. Currently my
guesses are that it was either a label Oscilloquartz used in the US
or it was a manufacturer that licensed the 8663 design.

BTW: You might want to have a look at the AXIOM130HP which is
a replacement part for the 8663 with the same stability specs
but slightly better phase noise.

Which makes me now wonder, what Axtal did to get this much further
down in noise without compromising aging. Bernd? If you are reading
this, would you mind to shed some light on this question?

> Further, the OpAmp N2B adds an offset to the DAC voltage. For the UCT oven,
> one would choose a gain of 2 for this OpAmp, such that it produces 5 volts;
> for the AXIOM oven, the gain would be 1.
> Thus, at C5, the voltage is the average of the output voltages of N2A and
> N2B which effectively lowers the tuning range of the OCXO, and the full 16
> bits of the DAC can be used for this narrower tuning range.

If you are using used OCXOs from ebay and similar sources, they might
be quite a bit off in frequncy, so that you might need the whole tuning
range.

> On the lower part of the schematic, I have added a circuit which is very
> similar to that one I reverse-engineered from a commercial GPSDO. N4 is an
> ordinary analog switch which has a very low on-resistance (2.5 Ohms). A PWM
> signal toggles the analog switch.

I would advice against using a CMOS switch. They are relatively slow and
their timing is not well defined. A better approach would be to use a single
gate inverter that has its power supplied tied to the voltage reference.
As you are working with a 2.5V reference, that gives you the additional
requirement that you have to use a gate that can work with higher input
voltages without latch-up or protection diodes. IIRC the ALVC and LVC
families allow that.

> N5A and N5B are configured as a Sallen-Key lowpass filter with a cutoff
> frequency around approx. 1 Hz. If a 16bit PWM would be used, the PWM
> frequency would be around 1.2 kHz; I measured a similar frequency in the
> commercial GPSDO so I assume that should be sufficient. The Sallen-Key
> lowpass filters the PWM very effectively.

I recommend not using PWM but instead a delta-sigma modulator.
In the above example, the PWM will give you 1.2kHz/1Hz = 1200 steps -> ~10bit
While a first order delta-sigma gives you 1.5*log_2(1.2kHz/1Hz) = ~15bit.
A second order delta-sigma gives you a factor of 2.5 and thus ~25bits.
Additionally, the spurs (or rather idle-tones in this application)
produced in delta-sigma modulators are higher up in frequency and
of lower magnitude than with PWM. For a GPSDO I would go with either
a 2nd order (is unconditionally stable) or go with one in the 4-10th
order range in order to keep the idle-tones low power and high enough
in frequency to matter very little.

> My first idea was to have the PWM DAC as an alternative to the resistor
> string - on my PCB, one could populate either the upper part or the lower
> part and use one of the two DACs. However, I recently found an application
> note from Jim Williams where he used two DACs and combined their output
> voltages such that he could effectively achieve a 20bit DAC. And when I read
> your email again, you suggest also something around 20 bits, so basically I
> could to the same thing: I could use only a, say, 8 bit PWM (and therefore a
> quite high switching frequency) and let the Sallen-Key filter produce a
> variable offset voltage, while the DAC is used only for the fine-tuning. I
> have not made any sophisticated calculations so far about this, but from a
> first gutt feeling I'd say that this configuration would also allow for
> something around 20 bits, no?

While you can get higher resolution by combining two DACs, that depends
on the coarse DAC being low noise and stable as to not compromise the
fine DAC's gain in resolution. Additionally Jim's Appnote uses a feedback
ADC to calibrate the whole system to actually achieve the 20bits. What you
could do, would be to keep the delta-sigma modulator and use an LTC2410
as feedback. The delta-sigma would provide the short term control an the
LTC2410 could provide you with long term offset compensation. This would
give you sub-ppm/°C drift (offset drift is spec'ed at 10nV/°C and full
scale at 0.03ppm/°C).
Ie your drift would be the fully dominated by the voltage reference.
You should not use the LTC2410's output without filtering, though,
as there is significant noise on it (0.8ppm RMS @2.5Vref).

Alternatively, the single-ended LTC2400 might be easier to use, but
does not offer auto-calibration (ie offset and full-scale corrections)
Thus has slightly higher offset-drift (0.02ppm/°C), which is still
much lower than your voltage reference, so shouldn't be an issue.

> In this case, one would populate resistors R3 and R16 and remove R8. The
> Sallen-Key then should have a gain of 4 for the UCT oven or 2 for the AXIOM
> oven, and with a 8 bit PWM could do a coarse adjustment of the OCXO voltage
> while the resistor string DAC would do only the fine tuning. I wonder
> whether this circuit would even allow 24 bits, but I guess no (at 24 bits of
> resolution one would possibly take into account nasty things like building
> of thermocouples on solder joints or mechanical stress of components due to
> soldering and other stuff I perhaps have never heard of nor I have even
> thought about ;-) so this is another rabbit hole I'd like to avoid for now).

Yes. This would work. Though you would need more then 8bit for the PWM.
You want to have some overlap between the MSB of the PWM and the LSB of
the DAC to avoid switching from one course-DAC code to another as much
as possible, because you have a ~0.5LSB DNL. Ie each time the coarse DAC
switches, you will have a jump in your output voltage of unknown size.

Yes, you indeed do care about thermocouples. But not as much as you might
think. As I've written before, you want to keep your circuit in a stable
temperature environment. Usual values for EMF are in the order of a few µV
per °C temperature difference. If your board is in a slow moving thermal
environment, then the temperature gradient of your board will be
approximately constant. Which in turn means that the EMF of your system
will be approximately constant. Ie the offset drift due to EMF will be low.

That said, it is of course a good idea to keep EMF low. You will find
guidelines in how to do that in the datasheets and appnotes of low-drift
opamps from Linear and Analog.


> As a side note, I have foreseen as an option to populate a better voltage
> reference; the DAC I planned to use has its own internal reference having
> 2ppm/K. The external reference is N3, having only 1ppm/K.
>
> Further, I have considered another OpAmp than you suggested; mainly because
> I have already used that OpAmp in another application where I needed 16 bit
> ADCs (which worked fine) but also because I have lots of them (and I have
> not yet known the LTC2057). The AD8626 I use has an offset voltage of around
> 1mV having 2.5uV/K drift. Both specs seem to be acceptable. The main
> difference is that your LTC2057 has zero drift - but otherwise, "my" OpAmp
> seems to have quite similar specs compared to your LTC one, so I guess my
> choice was at least in the right direction :-) but a zero drift amp would
> definitely be interesting. However, if the temperature is stable enough, the
> drift should also not matter too much since it is so low.

The 2.5µV/°C means that you have 1ppm/°C drift (typical!) for an
input voltage range of 0-2.5V. I.e. it's getting close to what the DAC
does. Is this good enough? Most likely. But temperature offset drift
is not the only thing you need to worry about. You also have flicker
noise, which is the chopper of the LTC2057 gets rid off, while the
AD8626 has bascially unspecified flicker noise (the figures with the
noise density are not logarithmic, which means its impossible to tell
what the flicker noise actually is). Whether this actually matters or
not depends on quite a few parameters and cannot be answered easily.
And that's the reason why I choose the LTC2057: It is cheap enough
while doing away with lots of problems I would have to think about
and quantify. I.e. it simplified the design process considerably.


> One further note about the long time constant of 1000s or even more:
> I read somewhere that the more modern OCXOs no more use those long time
> constants; 1000s or more is more appropriate for old ovens like the HP10811A
> and similar because these ones seem to use a different type of crystal cut -
> which is bigger and more stable (?) but I don't know too much about this.
> From what I know from Ulrich Bangert's famous paper I'd also say that around
> 1000s is appropriate, but tests will be necessary for the particular oven to
> confirm the correct value. At least for the AXIOM75 oscillator 1000s is not
> appropriatem because this crystal has really good phase noise but not so
> good ADEV and therefore some 100s or so would be better for that. For the
> UCT-108663 I don't know yet.

The time constant is a matter of how stable your OCXO is and what you
use the GPSDO for. Most GPSDOs today are used as time references in cellular
base stations. This means that you want to have as accurate time as
possible. This in turn demands that you have a low time-constant
(the time constant is the knob which tunes between the accurate frequency
vs accurate time trade-off). And if you have a short time-constant,
you don't need a very stable OCXO (not accounting for hold-over),
which saves a lot of money.

You are planing to use an 8663, which is one of the more stable OCXO
out there. To make full use of it, you do want to have a long time
constant.... unless you care about ns precise time transfer... but then
there are better suited approaches there.


                        Attila Kinali


--
<JaberWorky>    The bad part of Zurich is where the degenerates
                throw DARK chocolate at you.

_______________________________________________
time-nuts mailing list -- time-nuts at lists.febo.com
To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com
and follow the instructions there.





More information about the Time-nuts_lists.febo.com mailing list