[time-nuts] DAC for OCXO disciplining

[Magnus Danielson]

Hi,

Sure. I want people to mentally retire PWM, it's only benefit is that it
is easy to understand, but it to some degree have the worst property you
can think of.

I did a very simple trick. First of all we have a "low" or "high" value
to output to the DAC. The "low" value is the higher bits of the value
you want, but with the lower (interpolated) bits scrapped, and the
"high" value is the "low" value plus 1 LSB of DAC values. We now have
the interpolating bits and then choose "high" or "low" in some pattern
to interpolate between them. This is exactly the same as PWM. We then
have a counter that counts which interpolation cycle we are in, again
the same as PWM. Now comes the difference. I then used the MSB of the
interpolation bits to steer the "high"/"low" value for every other bits,
thus muxed out when the LSB of the counter is 0. This moves the energy
of the MSB interpolation to the highest frequency, while achieving the
same average contribution. Now every other bit is free, and we used them
the same for the MSB-1 bit of the interpolator, using the LSB+1 bit of
the counter etc. Thus, the counter steers the selection of a mux-chain
(much as the carry chain in the PWM). The design pattern is trivial to
extend to interpolation of any bits.

The benefit of this is that as the interpolating values goes through a
first degree low-pass filter, you end up with the peak energy will be
flat, as the highest energy will now have a counter-acting -6 dB/Oct.

I was amazed that it was this simple to move energy to where it makes
less damage. Turns out that FPGA logic wise, it's at the same cost as PWM.

Now, there is other relatively simple ways of doing the same that I
would consider.

The error accumulator method is one, which is similar to phase-accumulation.

Cheers,
Magnus

On 2020-01-14 14:40, Bob kb8tq wrote:
> Hi
>
> Put another way - this is sort of why sigma delta was invented. The whole “move
> the energy” thing was very much core to the invention. These days, even some 
> pretty cheap micro’s have sigma delta hardware on them. So far I have yet to find
> one with quite the “right stuff” on it to do a DAC. The ones I’ve seen are more 
> targeted at ADC’s.
>
> Bob
>
>> On Jan 14, 2020, at 7:50 AM, Magnus Danielson <magnus at rubidium.se> wrote:
>>
>> Hi,
>>
>> On 2020-01-14 02:00, Hal Murray wrote:
>>> lifespeed at claybuccellato.com said:
>>>> Some thoughts that have occurred to me are coarse and fine DACs, possibly
>>>> sigma-delta or pulse width modulation (PWM).
>>> Pulse width modulation has noise at the frequency of the whole sequence.  A 10 
>>> bit DAC running at 1 megahertz will have noise at 1 kilohertz.  As you add 
>>> more bits to get better resolution, the noise frequency gets lower.  For 
>>> practical values, that noise may be hard to filter.  What doesn't get filtered 
>>> turns into spurs.
>>>
>> That is why PWM is not a very smart idea at all for these purposes.
>>
>> I've done a variant where I inverted the spectrum of PWM. I sketched on
>> an article but I never finished it.
>>
>> You want to place your most significant bit energy as high as possible,
>> and the same for the second most significant bit. Turns out that this
>> becomes fairly simple counter and mux solution which on average achieves
>> exactly the same level as the PWM, but with noise which is much easier
>> to filter and with about the same level of complexity as the PWM.
>>
>> But then, you can do first degree sigma-delta and achieve about the same
>> thing.
>>
>> But PWM for this, is not a good idea, it's in fact a terrible idea since
>> it has the most significant bit with the lowest frequency which becomes
>> hard to filter.
>>
>> Cheers,
>> Magnus
>>
>>
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