[time-nuts] Odd-order multiplication of CMOS-output OCXO

[Bob kb8tq]

Hi

> On Jan 20, 2020, at 1:01 PM, Mark Haun <mark at hau.nz> wrote:
> 
> Hi Attila,
> 
> On Mon, 20 Jan 2020 14:29:15 +0100
> Attila Kinali <attila at kinali.ch> wrote:
>> On Mon, 20 Jan 2020 11:13:46 +0100
>> Attila Kinali <attila at kinali.ch> wrote:
>> 
>>> With those constraints, and reading the discussion, I wonder why
>>> don't consider a VCXO+PLL solution. Using something like the
>>> Abracon ABLNO and a generic PLL (e.g. ADF4001) would give you above
>>> performance. The ABLNO are so low noise enough, that you can use a
>>> low BW loop filter (order of 500Hz) and get lower output noise than
>>> the up-multiplied 16MHz signal above that and the (multiplied) OCXO
>>> performance below that (with a slight bump due to the PLL around
>>> the loop filter frequency).  
>> 
>> Addendum: I don't know your application, but in a general high-speed
>> sampling systems, it's the white noise floor that you are worried
>> about, not the 1/f^a noise. And in that case, having a lown noise XO
>> produce your sampling clock is better than multiplying a low frequency
>> OCXO and using this directly, even if the XO is free running.
> 
> A fair question... in fact I was initially planning to use the ABLNO +
> a PLL.  The OCXOs I found, however, are CTS VFOV405's with phase noise
> claimed to be just as good as the ABLNO or CVHD VCXOs:
> https://www.ctscorp.com/wp-content/uploads/VFOV405.pdf

If you are starting at 16 MHz and multiplying by 5, the phase noise will degrade
by 20 log (N). In this case, that will be 14 db. The degradation may be more than that, 
but it can never be less.

Another issue is just how the spec’s actually apply. On any oscillator that is spec’d over a 
range of frequencies, some may do a bit better than others. Will this device at that frequency
exceed the spec by 6 db? Will another model at the same frequency “only” exceed the spec
by one db? Without testing a bunch of them …. no way to know.

Bob


> They are reasonably low power, small[-ish], and have adequate stability
> for my needs.  You can see why it is tempting to make the multiplier
> scheme work, as it should save on both power and board area. (The
> target application is a battery-powered SDR.)  So far there don't seem
> to be any show-stopper issues with the plan, except that I am going to
> have to put together a phase-noise measurement system, or find a friend
> with one.
> 
> To that end, I wonder if something like Andrew Holme's project,
> http://www.aholme.co.uk/PhaseNoise/Main.htm
> is the best "bang for the buck" right now?  It looks like that could be
> put together for well under $1k (minus the Wenzel ULN oscillator :).  A
> simpler, sound-card-based approach is also appealing, but I have not
> seen any ready-to-build projects published on the web, and I cannot
> afford to put in the hundreds of hours it would take to design my own.
> 
> Regards,
> Mark
> 
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