[time-nuts] Odd-order multiplication of CMOS-output OCXO

[Mark Haun]

On Mon, 20 Jan 2020 13:13:00 -0500
Bob kb8tq <kb8tq at n1k.org> wrote:
> On Jan 20, 2020, at 1:01 PM, Mark Haun <mark at hau.nz> wrote:
> > A fair question... in fact I was initially planning to use the
> > ABLNO + a PLL.  The OCXOs I found, however, are CTS VFOV405's with
> > phase noise claimed to be just as good as the ABLNO or CVHD VCXOs:
> > https://www.ctscorp.com/wp-content/uploads/VFOV405.pdf  
> 
> If you are starting at 16 MHz and multiplying by 5, the phase noise
> will degrade by 20 log (N). In this case, that will be 14 db. The
> degradation may be more than that, but it can never be less.
> 
> Another issue is just how the spec’s actually apply. On any
> oscillator that is spec’d over a range of frequencies, some may do a
> bit better than others. Will this device at that frequency exceed the
> spec by 6 db? Will another model at the same frequency “only” exceed
> the spec by one db? Without testing a bunch of them …. no way to know.

Well, worse than that, the VFOV405 phase noise is a "typical" not a
"max" spec ;)  On the other hand, I should have some leeway at only 80
MSPS and no bandpass sampling.  (The main spectrum of interest is 5-20
MHz.)  I am aware of the 20logN relationship and that there will be some
residual extra phase noise from my multiplier on top of it.

The VFOV405 datasheet lists typical phase noise for 10- and 100-MHz
units.  (Mine are 16.384 MHz.)  In comparing the two oscillators, I have
used the 100-MHz "typical" numbers which they both state:

offset    VFOV405    ABLNO
10        -90        -88
100       -120       -118
1k        -140       -141
10k       -160       -160
100k      -163       -161

(The ABLNO also provides a worst-case spec which is 3-5 dB worse.)

Regards,
Mark