[time-nuts] new WWVB BPSK dev board

[Poul-Henning Kamp]

--------
In message <AM0PR03MB4129FBD0922805FC14B8CEFDE4AF0 at AM0PR03MB4129.eurprd03.prod.outlook.com>, "John Moran, Scawby Design"
 writes:

>However, fast A-Ds are not particularly cheap and you would need
>circa 50MHz sample rate to resolve 1deg of the carrier, and TVB has
>already stated that there are no time benefits to BPSK, so this is
>all just an interesting technical exercise, isn't it?

I admit it would be interesting to do the allan variance on it,
but measuring the carrier to 1 degree in every single cycle is
waaaaay overkill.

1 MHz sampling rate is fine, but go for 5 or 10 MHz so you can
drive the ADC directly from your house-standard.

And BPSK *does* improve the timing, because you can very precisely
measure when the change of phase happens, and it since it happens
at a carrier zero-crossing you can filter it down to +/- sample.

-- 
Poul-Henning Kamp       | UNIX since Zilog Zeus 3.20
phk at FreeBSD.ORG         | TCP/IP since RFC 956
FreeBSD committer       | BSD since 4.3-tahoe    
Never attribute to malice what can adequately be explained by incompetence.