[time-nuts] Re: Project Great

Marek Doršic marek.dorsic at gmail.com
Sun Nov 28 21:06:21 UTC 2021


Hi,

    I'm also one of those fascinated by Project Great and this was The project inspired me to start with time related stuf.

Can Cs clock be avoided by prolonged period at high altitudes? Assume you can spend a month at the summit. Is e.g. the Rb drift stable enought to compensate and obtain viable results?

  .marek

> On 28 Nov 2021, at 21:39, Gerhard Hoffmann <ghf at hoffmann-hochfrequenz.de> wrote:
> 
> 
> 
> Am 28.11.21 um 18:37 schrieb Bernd Neubig:
>> -----Jim wrote-----
>> I wouldn't actually think there's a Cs on ISS.  What purpose would it serve?  We as time-nuts think "of course you'd have a precise source of time", but really, there's not much need for timing on ISS on a scale smaller than seconds, if that.  NTP to timestamp files, for instance.
>> You are probaly right about the actual situation. However there is the ESA ACES project idling since years without being launched yet:
>> "ACES is an ESA ultra-stable clock experiment, a time and frequency mission to be flown on the Columbus module of the ISS (International Space Station), in support of fundamental physics tests. The mission objectives are both scientific and technological and is of great interest to two main scientific communities:
>> • The Time and Frequency (T&F) community; which aims to use ACES as a tool for high precision Time and Frequency metrology
>> • The Fundamental Physics community; which will benefit from the use of ACES data for accurate tests of general relativity.
>> See https://earth.esa.int/web/eoportal/satellite-missions/i/iss-aces
>> The ACES development was initiated in the 1990s. However, the decision to complete the development of the project has been achieved only at the ESA council at Ministerial Level of November 2008.
>> The launch was planned in 2018, but,  
> 
> at first 2012, completely out of touch with the world.
> 
>> as said, the clock ensemble (which BTW includes two AXTAL OCXO 100 MHz) is still sitting on the test bench and waiting and waiting.
> 
> And I can say that the AXTALs simply sat there and worked, a
> great exception for this project.
> 
> I did a redesign of the analog part of the DMTD system between
> the H-Maser and the Cs that was accepted about 7 years ago,
> the time stretcher for photon flight time interpolation, a VHDL
> triple redundancy library that looked like std_logic/vector
> and that had the redundany mostly invisibly under the hood
> (we were not given the Xilinx tools), FPGA configuration memory
> scrubbing, SEU protection of the CPU, microwave link; constantly
> filling the voids by colleges who left.
> 
> Adventures of a freelancer.
> 
> Cheers,
> Gerhard, DK4XP
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