[time-nuts] Re: Catching range of GPSDO

glen english LIST glenlist at cortexrf.com.au
Fri Mar 4 00:44:31 UTC 2022


and how you handle these control transitions between a slow loop, and 
the next fast loop, and next fast etc etc , whether in software, or in 
hardware , example selecting which divider output to use,  is non trivial.

In hardware, I wll normally freeze the value, and wait a full cycle 
until the hardware change of divider that interrupts the counter has 
rippled through the system.

In software, there is a littl emore determinicity as it can be known 
which and what edge and counter ststus etc can be jam loaded , and also 
progressively slower loop constants can run simultaneously.  Also, step 
changes to (software)  loop constants can be realized (difficult in 
hardware)


On 4/03/2022 11:16 am, Bob kb8tq wrote:
> Hi
>
>
>> On Mar 3, 2022, at 3:36 PM, Erik Kaashoek <erik at kaashoek.com> wrote:
>>
>> The GPSDO I'm building started with frequency locking but now I'm adding
>> phase locking so the time stamping counter can be on GPS time.
>> A first version works with a PI controller setting the vc-tcxo Vtune DAC
>> based on the phase difference of the 10 MHz with the PPS phase. Due to
>> tolerances the tcxo frequency range is big and is set by a 16 bit DAC where
>> 1 bit is about 2e-11 frequency change.
> Take a look at just how good the LSB ( or maybe even LSB’s … ) on your
> DAC really are. Some are not all that great and others are quite impressive.
> Cost is indeed part of that. Summing a pair of lower resolution parts often
> turns out to be pretty cost competitive.
>
> With 2^16 steps a LSB of 2x10^-11 (and perfect linearity) you would get
> a 1.3 ppm tune range. If it’s symmetric you would get +/- 0.65 ppm. That
> probably is not “enough” to compensate for much aging on a low cost
> TCXO…..
>
>> Once the DAC value is close to the correct frequency the loop catches
>> nicely but if the setting is far off catching takes a long time.
>> A possible solution is to use the frequency error to set the DAC close to
>> the optimal frequency for catching.
>> Speed of catching is important as the design is intended to only be
>> switched on when needed.
>> Does anyone have pointers to info on how to do quick catching in such a
>> control loop?
> The “normal answer” is to use a sequence of control loops. You start off with
> a fast / wide band loop and then once it gets “good enough” you go to a
> somewhat narrower loop. Your state monitoring tells you when it’s got to an
> adequately settled point and you step again. It is not uncommon to have
> anywhere from a few to a dozen or so of these steps.
>
> Bob
>
>> Erik
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-- 
Glen English
RF Communications and Electronics Engineer

CORTEX RF

Pacific Media Technologies Pty Ltd trading as Cortex RF

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