[time-nuts] Re: 1 pps

[Gerhard Hoffmann]

Am 11.11.21 um 15:07 schrieb Andy Talbot:
> You seem to have gone to extraordinary lengths to trap out each unwanted
> product, yet  the final spectrum shows only -50dBc products.   That seems a
> poor return for that effort in filter design.

I did not want any resonant structures on 10 MHz because they
would determine phase stability and no longer the disciplined
crystal oven. Remember that a minimum phase network shifts
+- 45° at the -3 dB points and if the center frequency runs
away so does the phase.
The $0.50 crystals attack locally the sub/harmonics and leave
the 10 MHz alone since there is no resonance. The crystals
make life easier if you do not have a network analyzer since
you would have to guess the right # of turns on the Amidon
rings.

> I made a 5MHz doubler plus distribution for my HP5061. You can see the
> design at http://g4jnt.com/10MHzDist.pdf  The doubler is a full wave
> rectifier and the filter a three section top capacitor coupled LC
> resonator.    I achieved better than -80dBc rejection of the 5MHz
> fundamental and something like  -75dB at 15MHz but this far down,
> measurement is quite a challenge.

I have used diode rectifier frequency doublers in my 432 MHz transverter 
to multiply a 100 MHz ECOC-2522 CMOS oven to
400 MHz. The SDR is happy with the 32 MHz IF. That was much
more effort than planned. The 1:1 CMOS wave cannot be multiplied
directly, must be first transformed to a sine, rectifier, some
filtering, MMIC to make up for the loss, rectifier, some 200 MHz
filtering, MMIC to make up for the loss, saw-filter on 400 MHz,
more gain....

Then I saw the spectrum of the xtal oven, buffered by 2 par.
74lvc125. There is everything at high level up to a GHz. So I
dumped the 74lvc125 output into a $1.50 400 MHz SAW filter,
amplified it in a MMIC, second SAW-filter, next MMIC provides
+18 dBm for 2 ring mixers.

> For most practical purposes these levels are more than adequate, but I do
> sometimes directly multiply up to 10GHz or higher, using this 10MHz source
> as the reference input to a PLL synthesizer.   I think I've seen evidence
> that even -80dBc at 5MHz can introduce spurii at this level of
> multiplication, so really ought to be aiming at -100dBc - but that would be
> impossible to measure with any test equipment I have.   Even seeing -80dBc
> was a challenge.

5 MHz is quite low to start a multiplier chain to 10 GHz. Remember that 
each frequency doubling punishes your phase noise floor by 6 dB, and 
that gets quickly out of hand.

I've done PLL synthesizers (both ADF5356 and LMX2594) and
switching the reference makes that quickly clear.
BTW the ADF5356 uses a doubler to go to 10 GHz, the fundamental
is nearly as strong as the wanted output. A royal pain.
The LMX2594 goes from 7.5 to 15 GHz without doubling;
it can divide down to < 10 MHz.
The LMX2595 adds 15-20 GHz by doubling.

Because of the chip crisis you can't buy any of these right now.
:-(

pics:
- output of LVC buffer driven by 100 MHz CMOS
- synthesizer 100 or 400 MHz in, 15 GHz out + post amplifier(s).


>> Cheers, Gerhard
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